Principal Engineer Standard Cells IOs Memories & Reliability

Principal Engineer Standard Cells, IOs, Memories & Reliability

The successful applicant should have 12+ years of IO circuit design experience with knowledge of IOs like LVDS, DDR, high speed IOs and GPIO. ESD design experience is desirable but no mandatory. The applicant will be responsible for designing and delivering IO and ESD designs from specs to silicon with the relevant deliverables to chip […]

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