SoC Low-Power Engineer (Entry Level) Updated On Tue, Nov 28th, 2023 by Saurenergy Job Requirements:- RTL / Netlist Power Estimation at IP and SOC level, using industry-standard EDA tools for power estimation Hands-on experience in reporting dynamic/leakage power numbers, experience in checking clock gating efficiency, and power optimization techniques. Ability to analyze power data and derive meaningful optimization opportunities from that data Ability to develop UPF according to […] Read more
Regional Marketing Manager – Power and Energy Applications Updated On Tue, Nov 28th, 2023 by Saurenergy Develop the NXP Power and Energy vertical, primarily in India but covering the South Asia region, working effectively in multiple segments such as eMetering, ESS, Renewable Energy, Smart Grid, Inverters and AC/DC power applications. Develop Power and Energy horizontal competency across NXP portfolio to support the regional sales team and work together corporate product and […] Read more
System and SW Engineering Program Manager Updated On Wed, Sep 6th, 2023 by Saurenergy NXP’s Edge Processing Program Management team is looking for an experienced System and SW Engineering Program Manager (EPM) who will plan, execute, and deliver NPI Program for the Edge Processing IC product. As a candidate you need to have a strong technical background in embedded systems, IC and SW development processes, and leading engineering programs. […] Read more
Principal ASIC design engineer Updated On Mon, Aug 7th, 2023 by Saurenergy As a senior member in our Wi-Fi Connectivity MAC design team, the candidate would be responsible for overseeing development of one of our major subsystems. Duties include but not limited to architecture definition, design partitioning, low power optimization, design tradeoff analysis and providing implementation guidance to other team members as well as supporting critical customer […] Read more
Senior SoC DFT Engineer Updated On Mon, Aug 7th, 2023 by Saurenergy Responsibilities:- Leading DFT implementation, integration and verification of System-on-Chip (SoC) from initial specification till tapeout and production. Addressing test quality targets in DFT architecture and test pattern generation. Leading various aspects of Test architecture including Scan&ATPG, Memory BIST, Logic BIST, Analog/PHY test and post-silicon support Work with different functions like front-end design, verification and physical […] Read more
EMIR Design Methodology Engineer Updated On Mon, May 8th, 2023 by Saurenergy Roles and Responsibilities:- Perform power integrity analysis (IR), and Electro-migration (EM) using Redhawk SeaScape and/ or Cadence Voltus, provide feedback, and recommend EMIR mitigation strategies Develop procedures, analysis, and design automation methodologies for power integrity challenges Generate needed views and input data for Power Integrity Analysis Help improve the design flow and methodology Supporting Chip […] Read more
Senior eUICC Test Engineer Updated On Tue, Nov 2nd, 2021 by Saurenergy This role requires the engineer to:- Work as an individual contributor in the test team responsible for delivering high quality NXP flagship embedded software products in the SmartCard / eUICC domain. Understand key feature requirements that may originate from technical standard documents or from internal documents and develop test specifications and test cases for the […] Read more
Principal Design Engineer Updated On Tue, Nov 2nd, 2021 by Saurenergy Responsibilities:- Understanding and creating Architecture Specification of Analog IP for product line-RF Processing Leading an analog IP. Participating in R&D of next generation Rx architectures for 77Ghz Radar. Close Collaboration with silicon and package designers to satisfy SI, PI and EMI requirements Providing expert advice on design guidelines and solutions to SoC partners and customers […] Read more
Lead Analog Design Engineer Updated On Thu, Oct 21st, 2021 by Saurenergy Responsibilities:- Defining specifications for the Analog Mix Signal IPs based on product requirements. End to end ownership of IPs. Design and Verify IP performance requirements using appropriate behavioral modeling, simulation, and verification tools. Document designs and present reviews to peers. Guide Product teams on IP integration at SoC level Perform or Guide Lab characterization/ validation, […] Read more
