Metallization Paste for a Constantly Evolving Substrate

Metallization Paste for a Constantly Evolving Substrate


A lot of focus in the Photovoltaics (PV) industry is placed on the performance and reliability of final assembled modules and systems. However, further upstream there are hundreds of critical pieces that need to come together first. With >90% of the world’s installed PV being crystalline silicon-based [1], one of the key components is the metallization paste that forms the electrical grid and contacts on this type of cell. Without metallization, no electrons can be collected and therefore no electricity is produced; pretty important right? Metallization paste can be split into two main categories – aluminum or silver-based. Aluminum paste is used on the backside of p-type cells while silver paste is necessary on each side of both p and n-type solar cells.

Metallization Paste

Typical thick film silver pastes used on crystalline silicon (c-Si) solar cells consist of 85-90% Ag powder, 5- 10% organics, 1-5% glass frit and/or other inorganic additives. Each component has a critical role to play in the formation of a high efficiency cell. The silver controls sinter-ability and conductivity, the organic controls the printability and final line shape, while the glass controls specific reactions taking place on the wafer surface as well as adhesion. That sounds simple in theory, but the reality is much more complicated. The truth is that while each component has its primary role, each also reacts with the others, and in the end, each effects the paste in many various ways. For example, choosing a new silver in order to make a more conductive line might inhibit adhesion of the printed finger line to the wafer.

Choosing a new organic system for a finer line width might increase contact resistance resulting in lower efficiency, and so on.

Taking on the Challenge

The PV industry has been very successful in increasing module efficiency and lowering costs over the years by constantly making improvements to every component, and especially improvements to cell design and silicon wafer processing. For Heraeus Photovoltaics, the market leader in silver metallization paste for the PV industry, a changing substrate has recently been one of the few constants.

Most times, when the wafer changes, the metallization paste needs to change too in order to achieve the best result. Our approach is to try to learn as much as possible about a new substrate – everything from emitter profile (dopant concentration and depth), to quantum efficiency, to surface morphology, to the diffuse and spectral reflectivity (Figure 1) of the new surface. Ideally, we also have knowledge of the overall cell structure and passivation layers. Each wafer characteristic has a role to play in determining the most compatible metallization paste which will yield the highest efficiency.

Following an experience and data-based approach, Heraeus is able to hold and grow its market leading position in an ever-changing market by quickly offering customized pastes for each new wafer developed by our customers. Over the past few years, the paste business has been characterized by increasing customization.

An easy way to confirm this is looking through historical product releases. In 2014 Heraeus announced the release of less than five new products to market; in 2017 that number skyrocketed to over 25. The paste market is no longer a one paste fits all model. Increased competition, advancing knowledge, and ever-heightening price-to-performance pressure requires the highest achievable efficiency on each type in order to meet market demands. Last year is as far as we need to look to find a case study regarding this exact model.

Diamond Wire Cut Multi-crystalline Wafers

The benefit of diamond wire saw cutting versus traditional slurry cutting is a large reduction of polysilicon waste, directly improving final price-per-watt cost. There are currently three primary “types” of diamond wire cut multi-crystalline (DWC) wafers. The three types are a result of different texturing process options after cutting, which is the key to the recent emergence of DWC wafers.

Two of these fall into the so-called “black silicon” category. These are Metal Catalyzed Chemical Etching (MCCE) and Reaction Ion Etching (RIE), and they are referred to as black silicon because the etching process significantly reduces surface reflectivity. More captured photons equals more electrons generated, thereby improving efficiency versus standard multi-crystalline cells. The other type of DWC wafer is generally referred to DWC with additive (also DWC – additive, or commonly just DWC by convention).

While this process in fact slightly increases surface reflectivity, unlike the black silicon wafers, it requires no additional processing steps compared to traditional multi-crystalline, giving it a clear cost advantage. The surface variation between the different types of wafers can be seen via SEM images in Figure 2. As can been easily seen, the DWC wafers have a drastically different surface texture than standard multi wafers, and the differences between one type of DWC wafer and another are just as large.

Because DWC multi cells outperform traditional multi ones on a priceper-watt basis, the market has quickly shifted to them. In fact, it is estimated that by the end of 2018, almost all silicon wafers will be diamond wire cut [2]. The issue comes with a standard paste’s ability to sufficiently adhere to these new wafer surfaces and potentially reduce the reliability of the final module. When considering the lofty warranties placed on modules of up to 30 years, ribbon adhesion failure is not an option.

The solution

Late last year, Heraeus announced the release of its newest product, SOL9651D. This paste was a direct response to the need for higher adhesion to DWC wafers. The huge change in front-surface morphology of DWC wafers is the cause of new adhesion requirements. Basically, silver paste optimized on past wafer types just doesn’t give the adhesive strength necessary to reliably produce modules. For Heraeus and its DWC-using customers, SOL9651D was the answer.

SOL9651D features a new glass with great adhesion and reliability on DWC/Black-silicon cells and a specially designed organic vehicle for DWC/Black-silicon texturing. The result is a silver paste with each component, and each mix of components, working to satisfy each condition needed for top of the line performance on DWC wafers: an organic system capable of defect free, fine line printing meaning optimal viscosity behavior and wetting on the new textured surface, a glass system which results in some of the highest adhesion values on the market without compromising in contact resistance or Voc, and a silver system that forms a highly conductive, densely sintered finger line which is compatible with both glass and vehicle in order to enable, and assist, in each of these properties.


With each new wafer type that comes around, the goal is never to just make a new metallization paste that works. The goal is to quickly produce a new metallization paste that performs at the maximum level of the wafer it is used on. Each wafer has its theoretical performance limit before it is metallized, and the goal of the paste is to stay as close to that limit as possible. Each day that a customer is printing a less-than-optimal paste on their cells is another day where PV modules will be produced which generate electricity below their true potential. For diamond wire cut multi-crystalline wafers, SOL9651D ensures all modules perform at the maximum capability of the wafers used within.

Supporting Figures

multi-crystalline wafers versus MCCE and Additve wafers

Figure 1: Graph showing significant changes in reflectivity for standard multi-crystalline wafers versus MCCE and Additve wafers. MCCE, a type of black silicon, shows significantly lower reflectivity, especially at lower wavelengths. In this case, an Additive textured wafer actually shows slightly lower reflectivity at low wavelengths and slightly higher reflectivity at high wavelengths.


wafer surfaces

Figure 2: SEM Images at 5000x of (A) standard multi-crystalline (B) typical diamond wire
cut – MCCE and (C) typical diamond wire cut – Additive, wafer surfaces. In each image,
the area is representative of the entire front surface of each p-type wafer processed
using varying techniques.


[1] Martin Green, “Commercial Progress and Challenges for Photovoltaics,” Nature Energy 1, Article ID 15015, 2016. [2] Colville, F. (Feb. 2018) Polysilicon consumption to decline below 4g/W in Q3 2018.

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