R&D Engineer, II

• You will work with Verification IP teams:
• To architect effective and efficient test-bench
• Strategize verification to promote effective debug.
• Build UVM infrastructure including monitors, drivers and scoreboards;
• Produce functional coverage and checker coverage;
• Monitor dashboards and regressions;
• Debug and understand root cause

Qualifications And Experiences:-

• 3+ Years’ experience in verification and developement of VIP using SV & UVM.
• Experience on any protocols.
• Sound debugging and communication skills plus positive attitude.
• Collaborate with Architects/methodology experts to achieve resolutions on issues or driving discussion from architecture/methodology perspective

Location:-

• Delhi, India.

Company Overview:-

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every day.