MIPI UFS/Unipro ASIC Digital Design Engineer

Synopsys Inc

  • Bangalore, India
MIPI UFS/Unipro ASIC Digital Design Engineer
Job Posted : Oct 14th, 2021

Job Description

The candidate will be part of the R&D in Solutions Group at our Bangalore Design Center, India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will include IP Design using latest HDL and design Flows .

Job Responsibilities:-

  • Will be working on the next generation MIPI UFS/Unipro protocols for commercial and Automotive applications
  • Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create architecture and micro-architecture with detailed design documents for some of the components of the design for medium to high complexity functionality.
  • Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debug, Test development etc.
  • May need to interact with customers to discuss/ understand customers’ specification requirements, if needed .
  • The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide.

Must have BSEE in EE with 12+ years of relevant experience or MSEE with 11+ years of relevant experience in the following areas:-

  • Knowledge of one or more of protocols: MIPI-UFS/Unipro, SD-MMC , Ethernet,  DDR, PCIe, USB, /USB/AMBA (AMBA2, AXI)
  • Hands on experience with architecting/ micro-architecture/ detailed design from Functional Specifications. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc.
  • Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools
  • Lint, CDC, Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background
  • Experience with Perforce or similar revision control environment
  • Knowledge of Perl/Shell scripts.
  • Exposure to quality processes in the context of IP design and verification is an added advantage
  • Ability to work/ Prior experience as a Technical Lead for a small team is a major plus.

In addition, the candidate should have good communication skills, should be a team player and possess good problem solving skills.


  • Bangalore, India.

Company Overview:-

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every day.